CMPs avoid this problem by filling the processor die with multiple, relatively simpler processor cores instead of just one big core. The exact size of a core CMPs can vary from very simple pipe for superscalar processors rather complicated, but once the core has been selected CMPs performance can easily scale across process generations simply by stamping down silicon more-hard-copy design, high speed processor cores in each successive generation of chips. In addition, the parallel execution of code, compiled by spreading multiple threads of execution in different cores, can achieve performance that is significantly higher than those possible using only single core. Low-latency inter-processor communications between the cores in the CMP to help create a wider application than worthy candidate for parallel execution is possible with conventional, multi-chip multiprocessors, however, limited parallelism in the application key is the main factor limiting the acceptance of CMPs in some type of system.