SPARK: A Parallelizing Approach to High - Level Synthesis of Digital Circuits presents a new approach to high-level synthesis of digital circuits - that parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. PHLS approach to discuss the problem of low quality of the synthesis and lack of control over the transformations applied during high-level synthesis with a current description of complex control systems, ie, with nested conditional loops. We describe the SPARK parallelizing high-level synthesis framework in which we have applied the techniques and shows the usefulness SPARK PHLS approach using designs derived from multimedia and image processing applications.