Development of neural networks has now reached the stage where they worked in a variety of practical contexts. Although it is generally recognized that the hardware implementation can, through excellence of performance, greatly increasing the use of neural networks, to date the relatively high cost of developing Application-Specific Integrated Circuits (Asics) means that only a small number neurocomputers hardware has gone beyond the research-prototype stage. The situation has now changed dramatically: with the view that large, dense, highly parallel FPGA circuits it has now become possible to imagine placing a large-scale neural networks in hardware, to obtain high performance with low cost. These challenges range from the choice of data representation, with the implementation of special functions, through the realization of massive parallel neural networks, and above this is a matter of secondary importance, such as development tools and technology transfer. FPGA Implementation of Neural Network aims to be an appropriate time to fill the gap in three ways: First, it will contain the appropriate base material and therefore suitable for advanced students or researchers new to the field.