Networks on Chip presents a variety of topics, issues and approaches with a common theme to systematically organize the on-chip communication in a network, regular communication with the chip, an NOC for short. As the number of processor cores and IP blocks integrated on a single chip continues to grow, systematic approach to design the communication infrastructure becomes necessary. This book summarizes the state of the art of these efforts and discuss key issues from the physical integration into the architecture for the operating system and application interfaces. In addition, this book will explain the consequences of adopting the design platform based on packet switched networks. Consequences may actually much reach as many topics distributed systems, distributed real-time, fault tolerant systems, parallel computer architecture, parallel programming and problem-on-chip system would appear relevant traditional but within the limits of single-chip VLSI implementation.