As a result, many existing validation techniques using bottom-up approach to design verification, in which architecture functions that are, in essence, reverse-engineered from its implementation. validation of traditional techniques using different reference models depending on the level of abstraction and verification tasks, so that potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the bottom-up approach that exists. The authors also address two fundamental challenges in functional verification: the lack of golden reference model, and the lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approachis designed for students, researchers, CAD tool developers, designers, and managers who are interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded system.